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-rw-r--r--src/arch/arm/ArmISA.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/ArmISA.py b/src/arch/arm/ArmISA.py
index b4e8536a0..70be40313 100644
--- a/src/arch/arm/ArmISA.py
+++ b/src/arch/arm/ArmISA.py
@@ -40,8 +40,8 @@ from m5.params import *
from m5.proxy import *
from m5.SimObject import SimObject
-from ArmPMU import ArmPMU
-from ISACommon import VecRegRenameMode
+from m5.objects.ArmPMU import ArmPMU
+from m5.objects.ISACommon import VecRegRenameMode
# Enum for DecoderFlavour
class DecoderFlavour(Enum): vals = ['Generic']