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-rw-r--r--src/arch/arm/SConscript8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript
index 51aff52f3..a907e52fb 100644
--- a/src/arch/arm/SConscript
+++ b/src/arch/arm/SConscript
@@ -65,10 +65,10 @@ if env['TARGET_ISA'] == 'arm':
SimObject('ArmNativeTrace.py')
SimObject('ArmTLB.py')
- TraceFlag('Arm')
- TraceFlag('TLBVerbose')
- TraceFlag('Faults', "Trace Exceptions, interrupts, svc/swi")
- TraceFlag('Predecoder', "Instructions returned by the predecoder")
+ DebugFlag('Arm')
+ DebugFlag('TLBVerbose')
+ DebugFlag('Faults', "Trace Exceptions, interrupts, svc/swi")
+ DebugFlag('Predecoder', "Instructions returned by the predecoder")
if env['FULL_SYSTEM']:
Source('interrupts.cc')
Source('stacktrace.cc')