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-rw-r--r--src/arch/arm/SConscript11
1 files changed, 9 insertions, 2 deletions
diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript
index f5fe1727c..92a4193f1 100644
--- a/src/arch/arm/SConscript
+++ b/src/arch/arm/SConscript
@@ -1,6 +1,7 @@
# -*- mode:python -*-
# Copyright (c) 2007-2008 The Florida State University
+# Copyright (c) 2009 ARM Limited
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
@@ -27,6 +28,7 @@
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Stephen Hines
+# Ali Saidi
Import('*')
@@ -43,6 +45,7 @@ if env['TARGET_ISA'] == 'arm':
Source('pagetable.cc')
Source('tlb.cc')
Source('vtophys.cc')
+ Source('utility.cc')
SimObject('ArmNativeTrace.py')
SimObject('ArmTLB.py')
@@ -50,8 +53,12 @@ if env['TARGET_ISA'] == 'arm':
TraceFlag('Arm')
TraceFlag('Faults', "Trace Exceptions, interrupts, svc/swi")
if env['FULL_SYSTEM']:
- #Insert Full-System Files Here
- pass
+ Source('interrupts.cc')
+ Source('stacktrace.cc')
+ Source('system.cc')
+
+ SimObject('ArmInterrupts.py')
+ SimObject('ArmSystem.py')
else:
Source('process.cc')
Source('linux/linux.cc')