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-rw-r--r--src/arch/arm/SConscript2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript
index 55ecabdc3..f5fe1727c 100644
--- a/src/arch/arm/SConscript
+++ b/src/arch/arm/SConscript
@@ -48,7 +48,7 @@ if env['TARGET_ISA'] == 'arm':
SimObject('ArmTLB.py')
TraceFlag('Arm')
-
+ TraceFlag('Faults', "Trace Exceptions, interrupts, svc/swi")
if env['FULL_SYSTEM']:
#Insert Full-System Files Here
pass