diff options
Diffstat (limited to 'src/arch/arm/insts/mem.hh')
| -rw-r--r-- | src/arch/arm/insts/mem.hh | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/src/arch/arm/insts/mem.hh b/src/arch/arm/insts/mem.hh index ddd196676..da4dac3f3 100644 --- a/src/arch/arm/insts/mem.hh +++ b/src/arch/arm/insts/mem.hh @@ -60,7 +60,8 @@ class Swap : public PredOp dest(_dest), op1(_op1), base(_base) {} - std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; + std::string generateDisassembly( + Addr pc, const SymbolTable *symtab) const override; }; class MightBeMicro : public PredOp @@ -118,13 +119,14 @@ class RfeOp : public MightBeMicro } StaticInstPtr - fetchMicroop(MicroPC microPC) const + fetchMicroop(MicroPC microPC) const override { assert(uops != NULL && microPC < numMicroops); return uops[microPC]; } - std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; + std::string generateDisassembly( + Addr pc, const SymbolTable *symtab) const override; }; // The address is a base register plus an immediate. @@ -158,13 +160,14 @@ class SrsOp : public MightBeMicro } StaticInstPtr - fetchMicroop(MicroPC microPC) const + fetchMicroop(MicroPC microPC) const override { assert(uops != NULL && microPC < numMicroops); return uops[microPC]; } - std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; + std::string generateDisassembly( + Addr pc, const SymbolTable *symtab) const override; }; class Memory : public MightBeMicro @@ -198,7 +201,7 @@ class Memory : public MightBeMicro } StaticInstPtr - fetchMicroop(MicroPC microPC) const + fetchMicroop(MicroPC microPC) const override { assert(uops != NULL && microPC < numMicroops); return uops[microPC]; |