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-rw-r--r--src/arch/arm/insts/misc.cc10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc
index a5a4e3b32..0eae37de0 100644
--- a/src/arch/arm/insts/misc.cc
+++ b/src/arch/arm/insts/misc.cc
@@ -153,6 +153,16 @@ ImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
}
std::string
+RegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+{
+ std::stringstream ss;
+ printMnemonic(ss);
+ printReg(ss, dest);
+ ccprintf(ss, ", #%d", imm);
+ return ss.str();
+}
+
+std::string
RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
std::stringstream ss;