2 files changed, 0 insertions, 31 deletions
diff --git a/src/arch/arm/insts/mem.cc b/src/arch/arm/insts/mem.cc
index 3b57aae64..9cc9af025 100644
--- a/src/arch/arm/insts/mem.cc
+++ b/src/arch/arm/insts/mem.cc
@@ -78,20 +78,6 @@ MemoryReg::printOffset(std::ostream &os) const
 }
 
 string
-Swap::generateDisassembly(Addr pc, const SymbolTable *symtab) const
-{
-    stringstream ss;
-    printMnemonic(ss);
-    printIntReg(ss, dest);
-    ss << ", ";
-    printIntReg(ss, op1);
-    ss << ", [";
-    printIntReg(ss, base);
-    ss << "]";
-    return ss.str();
-}
-
-string
 RfeOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 {
     stringstream ss;
diff --git a/src/arch/arm/insts/mem.hh b/src/arch/arm/insts/mem.hh
index da4dac3f3..0c82acfcf 100644
--- a/src/arch/arm/insts/mem.hh
+++ b/src/arch/arm/insts/mem.hh
@@ -47,23 +47,6 @@
 namespace ArmISA
 {
 
-class Swap : public PredOp
-{
-  protected:
-    IntRegIndex dest;
-    IntRegIndex op1;
-    IntRegIndex base;
-
-    Swap(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
-         IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _base)
-        : PredOp(mnem, _machInst, __opClass),
-          dest(_dest), op1(_op1), base(_base)
-    {}
-
-    std::string generateDisassembly(
-            Addr pc, const SymbolTable *symtab) const override;
-};
-
 class MightBeMicro : public PredOp
 {
   protected: