1 files changed, 22 insertions, 0 deletions
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index ee2799147..24baa4b0e 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -43,6 +43,7 @@
 #include "cpu/checker/cpu.hh"
 #include "debug/Arm.hh"
 #include "debug/MiscRegs.hh"
+#include "params/ArmISA.hh"
 #include "sim/faults.hh"
 #include "sim/stat_control.hh"
 #include "sim/system.hh"
@@ -50,6 +51,21 @@
 namespace ArmISA
 {
 
+ISA::ISA(Params *p)
+    : SimObject(p)
+{
+    SCTLR sctlr;
+    sctlr = 0;
+    miscRegs[MISCREG_SCTLR_RST] = sctlr;
+    clear();
+}
+
+const ArmISAParams *
+ISA::params() const
+{
+    return dynamic_cast<const Params *>(_params);
+}
+
 void
 ISA::clear()
 {
@@ -641,3 +657,9 @@ ISA::setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc)
 }
 
 }
+
+ArmISA::ISA *
+ArmISAParams::create()
+{
+    return new ArmISA::ISA(this);
+}