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-rw-r--r--src/arch/arm/isa.cc4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 9d76ca60e..b8a0fe282 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -189,7 +189,9 @@ ISA::readMiscReg(int misc_reg, ThreadContext *tc)
switch (misc_reg) {
case MISCREG_MPIDR:
- return tc->cpuId();
+
+ return 0x80000000 | // multiprocessor extensions available
+ tc->cpuId();
break;
case MISCREG_ID_MMFR0:
return 0x03; // VMSAv7 support