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-rw-r--r--src/arch/arm/isa.cc10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 878ff70d7..22d275d52 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -82,12 +82,14 @@ ISA::ISA(Params *p)
highestELIs64 = system->highestELIs64();
haveSecurity = system->haveSecurity();
haveLPAE = system->haveLPAE();
+ haveCrypto = system->haveCrypto();
haveVirtualization = system->haveVirtualization();
haveLargeAsid64 = system->haveLargeAsid64();
physAddrRange = system->physAddrRange();
} else {
highestELIs64 = true; // ArmSystem::highestELIs64 does the same
haveSecurity = haveLPAE = haveVirtualization = false;
+ haveCrypto = false;
haveLargeAsid64 = false;
physAddrRange = 32; // dummy value
}
@@ -122,6 +124,10 @@ ISA::clear()
// AArch32 or AArch64
initID64(p);
+ miscRegs[MISCREG_ID_ISAR5] = insertBits(
+ miscRegs[MISCREG_ID_ISAR5], 19, 4,
+ haveCrypto ? 0x1112 : 0x0);
+
if (FullSystem && system->highestELIs64()) {
// Initialize AArch64 state
clear64(p);
@@ -344,6 +350,10 @@ ISA::initID64(const ArmISAParams *p)
miscRegs[MISCREG_ID_AA64MMFR0_EL1] = insertBits(
miscRegs[MISCREG_ID_AA64MMFR0_EL1], 3, 0,
encodePhysAddrRange64(physAddrRange));
+ // Crypto
+ miscRegs[MISCREG_ID_AA64ISAR0_EL1] = insertBits(
+ miscRegs[MISCREG_ID_AA64ISAR0_EL1], 19, 4,
+ haveCrypto ? 0x1112 : 0x0);
}
void