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-rw-r--r--src/arch/arm/isa.hh8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index df1b49a99..fd9801ae2 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -429,14 +429,6 @@ namespace ArmISA
void startup(ThreadContext *tc) {}
- /** Check if all CPUs have their caches enabled and if they do
- * disable the bootAddrUncacheability flag because it's no longer
- * needed.
- * @s_idx the register number of the SCTLR that we are checking
- * @tc Threadcontext to use to get access to the system and other cpus
- */
- void updateBootUncacheable(int sctlr_idx, ThreadContext *tc);
-
/// Explicitly import the otherwise hidden startup
using SimObject::startup;