diff options
Diffstat (limited to 'src/arch/arm/isa/decoder.isa')
| -rw-r--r-- | src/arch/arm/isa/decoder.isa | 22 |
1 files changed, 1 insertions, 21 deletions
diff --git a/src/arch/arm/isa/decoder.isa b/src/arch/arm/isa/decoder.isa index fbeb2da22..f52cbe1a1 100644 --- a/src/arch/arm/isa/decoder.isa +++ b/src/arch/arm/isa/decoder.isa @@ -39,33 +39,13 @@ // decode COND_CODE default Unknown::unknown() { 0xf: decode COND_CODE { - 0x0: decode OPCODE { - // Just a simple trick to allow us to specify our new uops here - 0x2: ArmLoadMemory::ldr_uop({{ Rd = Mem; }}, - {{ EA = Raddr + (up ? disp : -disp); }}, - inst_flags = [IsMicroop]); - 0x3: ArmStoreMemory::str_uop({{ Mem = Rd; }}, - {{ EA = Raddr + (up ? disp : -disp); }}, - inst_flags = [IsMicroop]); - } 0x1: decode OPCODE { + // Just a simple trick to allow us to specify our new uops here 0x0: PredIntOp::mvtd_uop({{ Fd.ud = ((uint64_t) Rhi << 32)|Rlo; }}, 'IsMicroop'); 0x1: PredIntOp::mvfd_uop({{ Rhi = (Fd.ud >> 32) & 0xffffffff; Rlo = Fd.ud & 0xffffffff; }}, 'IsMicroop'); - 0x2: ArmLoadMemory::ldhi_uop({{ Rhi = Mem; }}, - {{ EA = Rn + (up ? disp : -disp); }}, - inst_flags = [IsMicroop]); - 0x3: ArmLoadMemory::ldlo_uop({{ Rlo = Mem; }}, - {{ EA = Rn + (up ? disp : -disp); }}, - inst_flags = [IsMicroop]); - 0x4: ArmStoreMemory::sthi_uop({{ Mem = Rhi; }}, - {{ EA = Rn + (up ? disp : -disp); }}, - inst_flags = [IsMicroop]); - 0x5: ArmStoreMemory::stlo_uop({{ Mem = Rlo; }}, - {{ EA = Rn + (up ? disp : -disp); }}, - inst_flags = [IsMicroop]); } default: Unknown::unknown(); // TODO: Ignore other NV space for now } |