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-rw-r--r--src/arch/arm/isa/decoder/arm.isa3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/arm/isa/decoder/arm.isa b/src/arch/arm/isa/decoder/arm.isa
index 163da5ca0..467b98eaa 100644
--- a/src/arch/arm/isa/decoder/arm.isa
+++ b/src/arch/arm/isa/decoder/arm.isa
@@ -109,9 +109,10 @@ format DataOp {
#endif
}
default: PredImmOp::msr_i_cpsr({{
+ SCTLR sctlr = Sctlr;
uint32_t newCpsr =
cpsrWriteByInstr(Cpsr | CondCodes,
- rotated_imm, RN, false);
+ rotated_imm, RN, false, sctlr.nmfi);
Cpsr = ~CondCodesMask & newCpsr;
CondCodes = CondCodesMask & newCpsr;
}});