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Diffstat (limited to 'src/arch/arm/isa/decoder/thumb.isa')
-rw-r--r--src/arch/arm/isa/decoder/thumb.isa203
1 files changed, 8 insertions, 195 deletions
diff --git a/src/arch/arm/isa/decoder/thumb.isa b/src/arch/arm/isa/decoder/thumb.isa
index dfaca8f42..9071649a2 100644
--- a/src/arch/arm/isa/decoder/thumb.isa
+++ b/src/arch/arm/isa/decoder/thumb.isa
@@ -43,98 +43,18 @@
1: decode BIGTHUMB {
// 16 bit thumb instructions.
0: decode TOPCODE_15_13 {
- 0x0, 0x1: decode TOPCODE_13_11 {
- 0x0: WarnUnimpl::lsl(); //immediate
- 0x1: WarnUnimpl::lsr(); //immediate
- 0x2: WarnUnimpl::asr(); //immediate
- 0x3: decode TOPCODE_10_9 {
- 0x0: WarnUnimpl::add(); //register
- 0x1: WarnUnimpl::sub(); //register
- 0x2: WarnUnimpl::add(); //3 bit immediate
- 0x3: WarnUnimpl::sub(); //3 bit immediate
- }
- 0x4: WarnUnimpl::mov(); //immediate
- 0x5: WarnUnimpl::cmp(); //immediate
- 0x6: WarnUnimpl::add(); //8 bit immediate, thumb
- 0x7: WarnUnimpl::sub(); //8 bit immediate, thumb
- }
+ 0x0, 0x1: Thumb16ShiftAddSubMoveCmp::thumb16ShiftAddMoveCmp();
0x2: decode TOPCODE_12_10 {
- // Data processing
- 0x0: decode TOPCODE_9_6 {
- 0x0: WarnUnimpl::and(); //register
- 0x1: WarnUnimpl::eor(); //register
- 0x2: WarnUnimpl::lsl(); //register
- 0x3: WarnUnimpl::lsr(); //register
- 0x4: WarnUnimpl::asr(); //register
- 0x5: WarnUnimpl::adc(); //register
- 0x6: WarnUnimpl::sbc(); //register
- 0x7: WarnUnimpl::ror(); //register
- 0x8: WarnUnimpl::tst(); //register
- 0x9: WarnUnimpl::rsb(); //immediate
- 0xa: WarnUnimpl::cmp(); //register (high registers)
- 0xb: WarnUnimpl::cmn(); //register
- 0xc: WarnUnimpl::orr(); //register
- 0xd: WarnUnimpl::mul();
- 0xe: WarnUnimpl::bic(); //register
- 0xf: WarnUnimpl::mvn(); //register
- }
- // Special data instructions and branch and exchange
- 0x1: decode TOPCODE_9_6 {
- 0x0: WarnUnimpl::add(); //register (low registers)
- 0x1, 0x2, 0x3: WarnUnimpl::add(); //register (high registers)
- 0x4: WarnUnimpl::unpredictable(); //?
- 0x5, 0x6, 0x7: WarnUnimpl::cmp(); //register
- 0x8: WarnUnimpl::mov(); //register (low registers)
- 0x9, 0xa, 0xb: WarnUnimpl::mov(); //register (high registers)
- 0xc, 0xd: WarnUnimpl::bx();
- 0xe, 0xf: WarnUnimpl::blx(); //register
- }
+ 0x0: Thumb16DataProcessing::thumb16DataProcessing();
+ 0x1: Thumb16SpecDataAndBx::thumb16SpecDataAndBx();
0x2, 0x3: Thumb16MemLit::thumb16MemLit();
default: Thumb16MemReg::thumb16MemReg();
}
0x3, 0x4: Thumb16MemImm::thumb16MemImm();
0x5: decode TOPCODE_12_11 {
- 0x0: WarnUnimpl::adr();
- 0x1: WarnUnimpl::add(); //sp, immediate
- 0x2: decode TOPCODE_10_8 {
- 0x0: decode TOPCODE_7 {
- 0x0: WarnUnimpl::add(); //sp, immediate
- 0x1: WarnUnimpl::sub(); //sp, immediate
- }
- 0x1, 0x3: WarnUnimpl::cbz(); //cbnz too...
- 0x2: decode TOPCODE_7_6 {
- 0x0: WarnUnimpl::sxth();
- 0x1: WarnUnimpl::sxtb();
- 0x2: WarnUnimpl::uxth();
- 0x3: WarnUnimpl::uxtb();
- }
- 0x4, 0x5: WarnUnimpl::pop();
- 0x6: decode TOPCODE_7_5 {
- 0x2: WarnUnimpl::setend();
- 0x3: WarnUnimpl::cps();
- }
- }
- 0x3: decode TOPCODE_10_8 {
- 0x1, 0x3: WarnUnimpl::cbz(); //cbnz too...
- 0x2: decode TOPCODE_7_6 {
- 0x0: WarnUnimpl::rev();
- 0x1: WarnUnimpl::rev16();
- 0x3: WarnUnimpl::revsh();
- }
- 0x4, 0x5: WarnUnimpl::pop();
- 0x6: WarnUnimpl::bkpt();
- 0x7: decode TOPCODE_3_0 {
- 0x0: WarnUnimpl::it();
- default: decode TOPCODE_7_4 {
- 0x0: WarnUnimpl::nop();
- 0x1: WarnUnimpl::yield();
- 0x2: WarnUnimpl::wfe();
- 0x3: WarnUnimpl::wfi();
- 0x4: WarnUnimpl::sev();
- default: WarnUnimpl::unallocated_hint();
- }
- }
- }
+ 0x0: Thumb16Adr::thumb16Adr();
+ 0x1: Thumb16AddSp::thumb16AddSp(); //sp, immediate
+ 0x2, 0x3: Thumb16Misc::thumb16Misc();
}
0x6: decode TOPCODE_12_11 {
0x0, 0x1: Thumb16MacroMem::thumb16MacroMem();
@@ -197,45 +117,7 @@
}
}
}
- 0x1: decode HTOPCODE_8_5 {
- 0x0: decode LTRD {
- 0xf: decode HTS {
- 0x1: WarnUnimpl::tst(); // register
- }
- default: WarnUnimpl::and(); // register
- }
- 0x1: WarnUnimpl::bic(); // register
- 0x2: decode HTRN {
- 0xf: WarnUnimpl::mov(); // register
- default: WarnUnimpl::orr(); // register
- }
- 0x3: decode HTRN {
- 0xf: WarnUnimpl::mvn(); // register
- default: WarnUnimpl::orn(); // register
- }
- 0x4: decode LTRD {
- 0xf: decode HTS {
- 0x1: WarnUnimpl::teq(); // register
- }
- default: WarnUnimpl::eor(); // register
- }
- 0x6: WarnUnimpl::pkh();
- 0x8: decode LTRD {
- 0xf: decode HTS {
- 0x1: WarnUnimpl::cmn(); // register
- }
- default: WarnUnimpl::add(); // register
- }
- 0xa: WarnUnimpl::adc(); // register
- 0xb: WarnUnimpl::sbc(); // register
- 0xd: decode LTRD {
- 0xf: decode HTS {
- 0x1: WarnUnimpl::cmp(); // register
- }
- default: WarnUnimpl::sub(); // register
- }
- 0xe: WarnUnimpl::rsb(); // register
- }
+ 0x1: Thumb32DataProcShiftReg::thumb32DataProcShiftReg();
default: decode HTOPCODE_9_8 {
0x2: decode LTOPCODE_4 {
0x0: decode LTCOPROC {
@@ -280,76 +162,7 @@
}
0x2: decode LTOPCODE_15 {
0x0: decode HTOPCODE_9 {
- 0x0: decode HTOPCODE_8_5 {
- 0x0: decode LTRD {
- 0xf: decode HTS {
- 0x1: DataModImmOp::tst({{
- resTemp = Rn & rotated_imm;
- }});
- }
- default: DataModImmOp::and({{
- Rs = resTemp = Rn & rotated_imm;
- }});
- }
- 0x1: DataModImmOp::bic({{
- Rs = resTemp = Rn & ~rotated_imm;
- }});
- 0x2: decode HTRN {
- 0xf: DataModImmOp::mov({{
- Rs = resTemp = rotated_imm;
- }});
- default: DataModImmOp::orr({{
- Rs = resTemp = Rn | rotated_imm;
- }});
- }
- 0x3: decode HTRN {
- 0xf: DataModImmOp::mvn({{
- Rs = resTemp = ~rotated_imm;
- }});
- default: DataModImmOp::orn({{
- Rs = resTemp = Rn | ~rotated_imm;
- }});
- }
- 0x4: decode LTRD {
- 0xf: decode HTS {
- 0x1: DataModImmOp::teq({{
- resTemp = Rn ^ rotated_imm;
- }});
- }
- default: DataModImmOp::eor({{
- Rs = resTemp = Rn ^ rotated_imm;
- }});
- }
- 0x8: decode LTRD {
- 0xf: decode HTS {
- 0x1: DataModImmOp::cmn({{
- resTemp = Rn + rotated_imm;
- }}, add);
- }
- default: DataModImmOp::add({{
- Rs = resTemp = Rn + rotated_imm;
- }}, add);
- }
- 0xa: DataModImmOp::adc({{
- Rs = resTemp = Rn + rotated_imm + CondCodes<29:>;
- }}, add);
- 0xb: DataModImmOp::sbc({{
- Rs = resTemp = Rn - rotated_imm - !CondCodes<29:>;
- }}, sub);
- 0xd: decode LTRD {
- 0xf: decode HTS {
- 0x1: DataModImmOp::cmp({{
- resTemp = Rn - rotated_imm;
- }}, sub);
- }
- default: DataModImmOp::sub({{
- Rs = resTemp = Rn - rotated_imm;
- }}, sub);
- }
- 0xe: DataModImmOp::rsb({{
- Rs = resTemp = rotated_imm - Rn;
- }}, rsb);
- }
+ 0x0: Thumb32DataProcModImm::thumb32DataProcModImm();
0x1: WarnUnimpl::Data_processing_plain_binary_immediate();
}
0x1: WarnUnimpl::Branches_and_miscellaneous_control();
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-14 14:54:32 +0000