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-rw-r--r--src/arch/arm/isa/formats/data.isa43
1 files changed, 30 insertions, 13 deletions
diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa
index b5e29c583..cff3d22f0 100644
--- a/src/arch/arm/isa/formats/data.isa
+++ b/src/arch/arm/isa/formats/data.isa
@@ -1114,19 +1114,36 @@ def format ArmMisc() {{
false);
case 0x9:
if (RN == 0) {
- switch (IMM) {
- case 0x0:
- return new NopInst(machInst);
- case 0x1:
- return new YieldInst(machInst);
- case 0x2:
- return new WfeInst(machInst);
- case 0x3:
- return new WfiInst(machInst);
- case 0x4:
- return new SevInst(machInst);
- default:
- return new Unknown(machInst);
+ if ((IMM & 0xf0) == 0xf0) {
+ return new Dbg(machInst);
+ } else {
+ switch (IMM) {
+ case 0x0:
+ return new NopInst(machInst);
+ case 0x1:
+ return new YieldInst(machInst);
+ case 0x2:
+ return new WfeInst(machInst);
+ case 0x3:
+ return new WfiInst(machInst);
+ case 0x4:
+ return new SevInst(machInst);
+ case 0x5:
+ return new WarnUnimplemented(
+ "sevl", machInst);
+ case 0x10:
+ return new WarnUnimplemented(
+ "esb", machInst);
+ case 0x12:
+ return new WarnUnimplemented(
+ "tsb csync", machInst);
+ case 0x14:
+ return new WarnUnimplemented(
+ "csdb", machInst);
+ default:
+ return new WarnUnimplemented(
+ "unallocated_hint", machInst);
+ }
}
} else {
return new MsrCpsrImm(machInst, imm, byteMask);