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Diffstat (limited to 'src/arch/arm/isa/formats/fp.isa')
-rw-r--r--src/arch/arm/isa/formats/fp.isa18
1 files changed, 10 insertions, 8 deletions
diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa
index 812338c30..0cb27d7f1 100644
--- a/src/arch/arm/isa/formats/fp.isa
+++ b/src/arch/arm/isa/formats/fp.isa
@@ -561,20 +561,22 @@ let {{
}
}
case 0xa:
+ if (q)
+ return new Unknown(machInst);
if (b) {
- return decodeNeonUSThreeReg<VpminD, VpminQ>(
- q, u, size, machInst, vd, vn, vm);
+ return decodeNeonUSThreeUSReg<VpminD>(
+ u, size, machInst, vd, vn, vm);
} else {
- return decodeNeonUSThreeReg<VpmaxD, VpmaxQ>(
- q, u, size, machInst, vd, vn, vm);
+ return decodeNeonUSThreeUSReg<VpmaxD>(
+ u, size, machInst, vd, vn, vm);
}
case 0xb:
if (b) {
- if (u) {
+ if (u || q) {
return new Unknown(machInst);
} else {
- return decodeNeonUThreeReg<NVpaddD, NVpaddQ>(
- q, size, machInst, vd, vn, vm);
+ return decodeNeonUThreeUSReg<NVpaddD>(
+ size, machInst, vd, vn, vm);
}
} else {
if (u) {
@@ -1542,7 +1544,7 @@ let {{
else
return new NVswpD<uint64_t>(machInst, vd, vm);
case 0x1:
- return decodeNeonUTwoMiscReg<NVtrnD, NVtrnQ>(
+ return decodeNeonUTwoMiscSReg<NVtrnD, NVtrnQ>(
q, size, machInst, vd, vm);
case 0x2:
return decodeNeonUTwoMiscReg<NVuzpD, NVuzpQ>(