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-rw-r--r--src/arch/arm/isa/formats/mem.isa22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa
index 13309ec9b..2ea45733b 100644
--- a/src/arch/arm/isa/formats/mem.isa
+++ b/src/arch/arm/isa/formats/mem.isa
@@ -213,6 +213,28 @@ def format AddrMode3() {{
decode_block = decode % subs
}};
+def format ArmSyncMem() {{
+ decode_block = '''
+ {
+ const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16);
+ const IntRegIndex rt = (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
+ const IntRegIndex rt2 = (IntRegIndex)(uint32_t)bits(machInst, 3, 0);
+ switch (PUBWL) {
+ case 0x10:
+ return new Swp(machInst, rt, rt2, rn);
+ case 0x14:
+ return new Swpb(machInst, rt, rt2, rn);
+ case 0x18:
+ return new WarnUnimplemented("strex", machInst);
+ case 0x19:
+ return new WarnUnimplemented("ldrex", machInst);
+ default:
+ return new Unknown(machInst);
+ }
+ }
+ '''
+}};
+
def format Thumb32LoadWord() {{
decode = '''
{