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Diffstat (limited to 'src/arch/arm/isa/formats/mem.isa')
-rw-r--r--src/arch/arm/isa/formats/mem.isa20
1 files changed, 0 insertions, 20 deletions
diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa
index 0c736f947..df1d067dc 100644
--- a/src/arch/arm/isa/formats/mem.isa
+++ b/src/arch/arm/isa/formats/mem.isa
@@ -358,20 +358,12 @@ def template StoreMemAccExecute {{
EA = xc->getEA();
if (fault == NoFault) {
- %(postacc_code)s;
- }
-
- if (fault == NoFault) {
fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
memAccessFlags, NULL);
if (traceData) { traceData->setData(Mem); }
}
if (fault == NoFault) {
- %(postacc_code)s;
- }
-
- if (fault == NoFault) {
%(op_wb)s;
}
}
@@ -406,10 +398,6 @@ def template StoreExecute {{
}
if (fault == NoFault) {
- %(postacc_code)s;
- }
-
- if (fault == NoFault) {
%(op_wb)s;
}
}
@@ -466,10 +454,6 @@ def template StoreCompleteAcc {{
if (arm_predicate(xc->readMiscReg(ArmISA::CPSR), condCode))
{
if (fault == NoFault) {
- %(postacc_code)s;
- }
-
- if (fault == NoFault) {
%(op_wb)s;
}
}
@@ -491,10 +475,6 @@ def template StoreCondCompleteAcc {{
if (arm_predicate(xc->readMiscReg(ArmISA::CPSR), condCode))
{
if (fault == NoFault) {
- %(postacc_code)s;
- }
-
- if (fault == NoFault) {
%(op_wb)s;
}
}