diff options
Diffstat (limited to 'src/arch/arm/isa/formats/mem.isa')
-rw-r--r-- | src/arch/arm/isa/formats/mem.isa | 165 |
1 files changed, 17 insertions, 148 deletions
diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa index 5f8a3695a..c25006d57 100644 --- a/src/arch/arm/isa/formats/mem.isa +++ b/src/arch/arm/isa/formats/mem.isa @@ -83,137 +83,10 @@ def template LoadStoreConstructor {{ } }}; - -def template StoreExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - Addr EA; - Fault fault = NoFault; - - %(op_decl)s; - %(op_rd)s; - %(ea_code)s; - - if (%(predicate_test)s) - { - if (fault == NoFault) { - %(memacc_code)s; - } - - if (fault == NoFault) { - fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, - memAccessFlags, NULL); - } - - if (fault == NoFault) { - %(op_wb)s; - } - } - - return fault; - } -}}; - -def template StoreInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - Addr EA; - Fault fault = NoFault; - - %(op_decl)s; - %(op_rd)s; - %(ea_code)s; - - if (%(predicate_test)s) - { - if (fault == NoFault) { - %(memacc_code)s; - } - - if (fault == NoFault) { - fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, - memAccessFlags, NULL); - } - - // Need to write back any potential address register update - if (fault == NoFault) { - %(op_wb)s; - } - } - - return fault; - } -}}; - - -def template StoreCompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - Fault fault = NoFault; - - %(op_decl)s; - %(op_rd)s; - - if (%(predicate_test)s) - { - if (fault == NoFault) { - %(op_wb)s; - } - } - - return fault; - } -}}; - -def template StoreCondCompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - Fault fault = NoFault; - - %(op_dest_decl)s; - - if (%(predicate_test)s) - { - if (fault == NoFault) { - %(op_wb)s; - } - } - - return fault; - } -}}; - let {{ def buildPUBWLCase(p, u, b, w, l): return (p << 4) + (u << 3) + (b << 2) + (w << 1) + (l << 0) - def buildMode2Inst(p, u, b, w, l, suffix, offset): - mnem = ("str", "ldr")[l] - op = ("-", "+")[u] - offset = op + ArmGenericCodeSubs(offset); - mem = ("Mem", "Mem.ub")[b] - code = ("%s = Rd;", "Rd = %s;")[l] % mem - ea_code = "EA = Rn %s;" % ("", offset)[p] - if p == 0 or w == 1: - code += "Rn = Rn %s;" % offset - if p == 0 and w == 0: - # Here's where we'll tack on a flag to make this a usermode access. - mnem += "t" - type = ("Store", "Load")[l] - newSuffix = "_%s_P%dU%dB%dW%d" % (suffix, p, u, b, w) - if b == 1: - mnem += "b" - return LoadStoreBase(mnem, mnem.capitalize() + newSuffix, - ea_code, code, mem_flags = [], inst_flags = [], - base_class = 'Memory' + suffix, - exec_template_base = type.capitalize()) - def buildMode3Inst(p, u, i, w, type, code, mnem): op = ("-", "+")[u] offset = ("%s Rm", "%s hilo")[i] % op @@ -228,7 +101,7 @@ let {{ exec_template_base = type.capitalize()) }}; -def format AddrMode2(imm, suffix, offset) {{ +def format AddrMode2(imm) {{ if eval(imm): imm = True else: @@ -243,20 +116,6 @@ def format AddrMode2(imm, suffix, offset) {{ for u in (0, 1): for b in (0, 1): for w in (0, 1): - (new_header_output, - new_decoder_output, - new_decode_block, - new_exec_output) = buildMode2Inst(p, u, b, w, 0, - suffix, offset) - header_output += new_header_output - decoder_output += new_decoder_output - exec_output += new_exec_output - decode_block += ''' - case %#x: - {%s} - break; - ''' % (buildPUBWLCase(p,u,b,w,0), new_decode_block) - post = (p == 0) user = (p == 0 and w == 0) writeback = (p == 0 or w == 1) @@ -272,21 +131,31 @@ def format AddrMode2(imm, suffix, offset) {{ if imm: newDecode = "return new %s(machInst, RD, RN," + \ "%s, machInst.immed11_0);" - className = loadImmClassName(post, add, writeback, + loadClass = loadImmClassName(post, add, writeback, size, False, user) - newDecode = newDecode % (className, addStr) + storeClass = storeImmClassName(post, add, writeback, + size, False, user) + loadDecode = newDecode % (loadClass, addStr) + storeDecode = newDecode % (storeClass, addStr) else: newDecode = "return new %s(machInst, RD, RN, %s," + \ "machInst.shiftSize," + \ "machInst.shift, RM);" - className = loadRegClassName(post, add, writeback, + loadClass = loadRegClassName(post, add, writeback, size, False, user) - newDecode = newDecode % (className, addStr) - decode_block += ''' + storeClass = storeRegClassName(post, add, writeback, + size, False, user) + loadDecode = newDecode % (loadClass, addStr) + storeDecode = newDecode % (storeClass, addStr) + decode = ''' case %#x: {%s} break; - ''' % (buildPUBWLCase(p,u,b,w,1), newDecode) + ''' + decode_block += decode % \ + (buildPUBWLCase(p,u,b,w,1), loadDecode) + decode_block += decode % \ + (buildPUBWLCase(p,u,b,w,0), storeDecode) decode_block += ''' default: return new Unknown(machInst); |