diff options
Diffstat (limited to 'src/arch/arm/isa/formats')
| -rw-r--r-- | src/arch/arm/isa/formats/aarch64.isa | 14 | ||||
| -rw-r--r-- | src/arch/arm/isa/formats/misc.isa | 20 |
2 files changed, 30 insertions, 4 deletions
diff --git a/src/arch/arm/isa/formats/aarch64.isa b/src/arch/arm/isa/formats/aarch64.isa index 00bd0770f..722cd7415 100644 --- a/src/arch/arm/isa/formats/aarch64.isa +++ b/src/arch/arm/isa/formats/aarch64.isa @@ -377,6 +377,20 @@ namespace Aarch64 return new FailUnimplemented(read ? "mrs" : "msr", machInst, full_mnemonic); + } else if (miscReg == MISCREG_IMPDEF_UNIMPL) { + auto full_mnemonic = + csprintf("%s op0:%d op1:%d crn:%d crm:%d op2:%d", + read ? "mrs" : "msr", + op0, op1, crn, crm, op2); + + if (miscRegInfo[miscReg][MISCREG_WARN_NOT_FAIL]) { + return new WarnUnimplemented(read ? "mrs" : "msr", + machInst, full_mnemonic + " treated as NOP"); + } else { + return new FailUnimplemented(read ? "mrs" : "msr", + machInst, full_mnemonic); + } + } else if (miscRegInfo[miscReg][MISCREG_IMPLEMENTED]) { if (miscReg == MISCREG_NZCV) { if (read) diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa index 4f1960b95..739741786 100644 --- a/src/arch/arm/isa/formats/misc.isa +++ b/src/arch/arm/isa/formats/misc.isa @@ -220,10 +220,22 @@ let {{ csprintf("miscreg crn:%d opc1:%d crm:%d opc2:%d %s unknown", crn, opc1, crm, opc2, isRead ? "read" : "write")); case MISCREG_IMPDEF_UNIMPL: - return new McrMrcImplDefined( - isRead ? "mrc implementation defined" : - "mcr implementation defined", - machInst, iss, MISCREG_IMPDEF_UNIMPL); + + if (miscRegInfo[miscReg][MISCREG_WARN_NOT_FAIL]) { + auto mnemonic = + csprintf("miscreg crn:%d opc1:%d crm:%d opc2:%d %s", + crn, opc1, crm, opc2, isRead ? "read" : "write"); + + return new WarnUnimplemented( + isRead ? "mrc implementation defined" : + "mcr implementation defined", + machInst, mnemonic + " treated as NOP"); + } else { + return new McrMrcImplDefined( + isRead ? "mrc implementation defined" : + "mcr implementation defined", + machInst, iss, MISCREG_IMPDEF_UNIMPL); + } case MISCREG_CP15ISB: return new Isb(machInst, iss); case MISCREG_CP15DSB: |