diff options
Diffstat (limited to 'src/arch/arm/isa/insts/branch.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/branch.isa | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/src/arch/arm/isa/insts/branch.isa b/src/arch/arm/isa/insts/branch.isa index b79f610b6..1aa37f483 100644 --- a/src/arch/arm/isa/insts/branch.isa +++ b/src/arch/arm/isa/insts/branch.isa @@ -153,14 +153,23 @@ let {{ #TBB, TBH for isTbh in (0, 1): if isTbh: - eaCode = "EA = Op1 + Op2 * 2" + eaCode = ''' + unsigned memAccessFlags = ArmISA::TLB::AllowUnaligned | + ArmISA::TLB::AlignHalfWord | + ArmISA::TLB::MustBeOne; + EA = Op1 + Op2 * 2 + ''' accCode = "NPC = readPC(xc) + 2 * (Mem.uh);" mnem = "tbh" else: - eaCode = "EA = Op1 + Op2" + eaCode = ''' + unsigned memAccessFlags = ArmISA::TLB::AllowUnaligned | + ArmISA::TLB::AlignByte | + ArmISA::TLB::MustBeOne; + EA = Op1 + Op2 + ''' accCode = "NPC = readPC(xc) + 2 * (Mem.ub);" mnem = "tbb" - eaCode = "unsigned memAccessFlags = 0;\n" + eaCode iop = InstObjParams(mnem, mnem.capitalize(), "BranchRegReg", {'ea_code': eaCode, 'memacc_code': accCode, |