summaryrefslogtreecommitdiff
path: root/src/arch/arm/isa/insts/data64.isa
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/arm/isa/insts/data64.isa')
-rw-r--r--src/arch/arm/isa/insts/data64.isa13
1 files changed, 1 insertions, 12 deletions
diff --git a/src/arch/arm/isa/insts/data64.isa b/src/arch/arm/isa/insts/data64.isa
index 48fc87ccb..3284d5b2a 100644
--- a/src/arch/arm/isa/insts/data64.isa
+++ b/src/arch/arm/isa/insts/data64.isa
@@ -248,18 +248,7 @@ let {{
Dest64 = (Op164 == 0) ? intWidth : (intWidth - 1 - findMsbSet(Op164));
''')
buildDataXRegInst("rbit", 1, '''
- uint64_t result = Op164;
- uint64_t lBit = 1ULL << (intWidth - 1);
- uint64_t rBit = 1ULL;
- while (lBit > rBit) {
- uint64_t maskBits = lBit | rBit;
- uint64_t testBits = result & maskBits;
- // If these bits are different, swap them by toggling them.
- if (testBits && testBits != maskBits)
- result ^= maskBits;
- lBit >>= 1; rBit <<= 1;
- }
- Dest64 = result;
+ Dest64 = reverseBits(Op164, intWidth/8);
''')
buildDataXRegInst("rev", 1, '''
if (intWidth == 32)