diff options
Diffstat (limited to 'src/arch/arm/isa/insts/fp.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/fp.isa | 15 |
1 files changed, 1 insertions, 14 deletions
diff --git a/src/arch/arm/isa/insts/fp.isa b/src/arch/arm/isa/insts/fp.isa index 4911d50f1..53d0b3413 100644 --- a/src/arch/arm/isa/insts/fp.isa +++ b/src/arch/arm/isa/insts/fp.isa @@ -235,21 +235,8 @@ let {{ decoder_output += FpRegRegOpConstructor.subst(vmrsFpscrIop); exec_output += PredOpExecute.subst(vmrsFpscrIop); - vmrsApsrCode = vmrsEnabledCheckCode + ''' - Dest = (MiscOp1 & imm) | (Dest & ~imm); - ''' - vmrsApsrIop = InstObjParams("vmrs", "VmrsApsr", "FpRegRegImmOp", - { "code": vmrsApsrCode, - "predicate_test": predicateTest, - "op_class": "SimdFloatMiscOp" }, - ["IsSerializeBefore"]) - header_output += FpRegRegImmOpDeclare.subst(vmrsApsrIop); - decoder_output += FpRegRegImmOpConstructor.subst(vmrsApsrIop); - exec_output += PredOpExecute.subst(vmrsApsrIop); - vmrsApsrFpscrCode = vmrsEnabledCheckCode + ''' - assert((imm & ~FpCondCodesMask) == 0); - Dest = (FpCondCodes & imm) | (Dest & ~imm); + Dest = FpCondCodes & FpCondCodesMask; ''' vmrsApsrFpscrIop = InstObjParams("vmrs", "VmrsApsrFpscr", "FpRegRegImmOp", { "code": vmrsApsrFpscrCode, |