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Diffstat (limited to 'src/arch/arm/isa/insts/ldr.isa')
-rw-r--r--src/arch/arm/isa/insts/ldr.isa6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/arm/isa/insts/ldr.isa b/src/arch/arm/isa/insts/ldr.isa
index 40d9147df..093ff7a60 100644
--- a/src/arch/arm/isa/insts/ldr.isa
+++ b/src/arch/arm/isa/insts/ldr.isa
@@ -93,6 +93,9 @@ let {{
eaCode += ";"
memFlags = ["ArmISA::TLB::MustBeOne", "%d" % (size - 1)]
+ if user:
+ memFlags.append("ArmISA::TLB::UserMode")
+
if prefetch:
Name = "%s_%s" % (mnem.upper(), Name)
memFlags.append("Request::PREFETCH")
@@ -179,6 +182,9 @@ let {{
eaCode += ";"
memFlags = ["%d" % (size - 1), "ArmISA::TLB::MustBeOne"]
+ if user:
+ memFlags.append("ArmISA::TLB::UserMode")
+
if prefetch:
Name = "%s_%s" % (mnem.upper(), Name)
memFlags.append("Request::PREFETCH")