diff options
Diffstat (limited to 'src/arch/arm/isa/insts/misc.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/misc.isa | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa index 6d6e56b8f..5eda615b5 100644 --- a/src/arch/arm/isa/insts/misc.isa +++ b/src/arch/arm/isa/insts/misc.isa @@ -813,7 +813,8 @@ let {{ exec_output += PredOpExecute.subst(bfiIop) mrc14code = ''' - MiscRegIndex miscReg = (MiscRegIndex) xc->tcBase()->flattenMiscIndex(op1); + MiscRegIndex miscReg = (MiscRegIndex) xc->tcBase()->flattenRegId( + RegId(MiscRegClass, op1)).index(); bool can_read, undefined; std::tie(can_read, undefined) = canReadCoprocReg(miscReg, Scr, Cpsr); if (!can_read || undefined) { @@ -837,7 +838,8 @@ let {{ mcr14code = ''' - MiscRegIndex miscReg = (MiscRegIndex) xc->tcBase()->flattenMiscIndex(dest); + MiscRegIndex miscReg = (MiscRegIndex) xc->tcBase()->flattenRegId( + RegId(MiscRegClass, dest)).index(); bool can_write, undefined; std::tie(can_write, undefined) = canWriteCoprocReg(miscReg, Scr, Cpsr); if (undefined || !can_write) { @@ -862,7 +864,8 @@ let {{ mrc15code = ''' int preFlatOp1 = flattenMiscRegNsBanked(op1, xc->tcBase()); MiscRegIndex miscReg = (MiscRegIndex) - xc->tcBase()->flattenMiscIndex(preFlatOp1); + xc->tcBase()->flattenRegId(RegId(MiscRegClass, + preFlatOp1)).index(); bool hypTrap = mcrMrc15TrapToHyp(miscReg, Hcr, Cpsr, Scr, Hdcr, Hstr, Hcptr, imm); bool can_read, undefined; @@ -893,7 +896,8 @@ let {{ mcr15code = ''' int preFlatDest = flattenMiscRegNsBanked(dest, xc->tcBase()); MiscRegIndex miscReg = (MiscRegIndex) - xc->tcBase()->flattenMiscIndex(preFlatDest); + xc->tcBase()->flattenRegId(RegId(MiscRegClass, + preFlatDest)).index(); bool hypTrap = mcrMrc15TrapToHyp(miscReg, Hcr, Cpsr, Scr, Hdcr, Hstr, Hcptr, imm); bool can_write, undefined; @@ -925,7 +929,8 @@ let {{ mrrc15code = ''' int preFlatOp1 = flattenMiscRegNsBanked(op1, xc->tcBase()); MiscRegIndex miscReg = (MiscRegIndex) - xc->tcBase()->flattenMiscIndex(preFlatOp1); + xc->tcBase()->flattenRegId(RegId(MiscRegClass, + preFlatOp1)).index(); bool hypTrap = mcrrMrrc15TrapToHyp(miscReg, Cpsr, Scr, Hstr, Hcr, imm); bool can_read, undefined; std::tie(can_read, undefined) = canReadCoprocReg(miscReg, Scr, Cpsr); @@ -955,7 +960,8 @@ let {{ mcrr15code = ''' int preFlatDest = flattenMiscRegNsBanked(dest, xc->tcBase()); MiscRegIndex miscReg = (MiscRegIndex) - xc->tcBase()->flattenMiscIndex(preFlatDest); + xc->tcBase()->flattenRegId(RegId(MiscRegClass, + preFlatDest)).index(); bool hypTrap = mcrrMrrc15TrapToHyp(miscReg, Cpsr, Scr, Hstr, Hcr, imm); bool can_write, undefined; std::tie(can_write, undefined) = canWriteCoprocReg(miscReg, Scr, Cpsr); |