summaryrefslogtreecommitdiff
path: root/src/arch/arm/isa/insts/misc64.isa
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/arm/isa/insts/misc64.isa')
-rw-r--r--src/arch/arm/isa/insts/misc64.isa3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/arch/arm/isa/insts/misc64.isa b/src/arch/arm/isa/insts/misc64.isa
index ac9f0a960..58f08f51e 100644
--- a/src/arch/arm/isa/insts/misc64.isa
+++ b/src/arch/arm/isa/insts/misc64.isa
@@ -146,8 +146,7 @@ let {{
exec_output += BasicExecute.subst(isbIop)
dsbIop = InstObjParams("dsb", "Dsb64", "ArmStaticInst", "",
- ['IsMemBarrier', 'IsSerializeAfter',
- 'IsSquashAfter'])
+ ['IsMemBarrier', 'IsSerializeAfter'])
header_output += BasicDeclare.subst(dsbIop)
decoder_output += BasicConstructor64.subst(dsbIop)
exec_output += BasicExecute.subst(dsbIop)