diff options
Diffstat (limited to 'src/arch/arm/isa/insts/str.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/str.isa | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/arch/arm/isa/insts/str.isa b/src/arch/arm/isa/insts/str.isa index 3f595692a..1c697d3ff 100644 --- a/src/arch/arm/isa/insts/str.isa +++ b/src/arch/arm/isa/insts/str.isa @@ -1,6 +1,6 @@ // -*- mode:c++ -*- -// Copyright (c) 2010-2011 ARM Limited +// Copyright (c) 2010-2011,2017 ARM Limited // All rights reserved // // The license below extends only to copyright in the software and shall @@ -228,7 +228,8 @@ let {{ def __init__(self, *args, **kargs): super(StoreImmEx, self).__init__(*args, **kargs) - self.codeBlobs["postacc_code"] = "Result = !writeResult;" + self.codeBlobs["postacc_code"] = \ + "Result = !writeResult; SevMailbox = 1; LLSCLock = 0;" class StoreImm(StoreImmInst, StoreSingle): decConstBase = 'LoadStoreImm' @@ -307,7 +308,8 @@ let {{ def __init__(self, *args, **kargs): super(StoreDoubleImmEx, self).__init__(*args, **kargs) - self.codeBlobs["postacc_code"] = "Result = !writeResult;" + self.codeBlobs["postacc_code"] = \ + "Result = !writeResult; SevMailbox = 1; LLSCLock = 0;" class StoreDoubleImm(StoreImmInst, StoreDouble): decConstBase = 'LoadStoreDImm' |