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Diffstat (limited to 'src/arch/arm/isa/operands.isa')
| -rw-r--r-- | src/arch/arm/isa/operands.isa | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index fefe9d925..f5d3e1042 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -69,6 +69,13 @@ let {{ }}; def operands {{ + #Abstracted integer reg operands + 'Dest': ('IntReg', 'uw', 'dest', 'IsInteger', 0, + maybePCRead, maybePCWrite), + 'Base': ('IntReg', 'uw', 'base', 'IsInteger', 1, + maybePCRead, maybePCWrite), + 'Index': ('IntReg', 'uw', 'index', 'IsInteger', 2, + maybePCRead, maybePCWrite), #General Purpose Integer Reg Operands 'Rd': ('IntReg', 'uw', 'RD', 'IsInteger', 1, maybePCRead, maybePCWrite), 'Rm': ('IntReg', 'uw', 'RM', 'IsInteger', 2, maybePCRead, maybePCWrite), |