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-rw-r--r--src/arch/arm/isa/operands.isa1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa
index 49a860213..b497564b7 100644
--- a/src/arch/arm/isa/operands.isa
+++ b/src/arch/arm/isa/operands.isa
@@ -227,6 +227,7 @@ def operands {{
'Fpexc': cntrlRegNC('MISCREG_FPEXC'),
'Sctlr': cntrlRegNC('MISCREG_SCTLR'),
'SevMailbox': cntrlRegNC('MISCREG_SEV_MAILBOX'),
+ 'LLSCLock': cntrlRegNC('MISCREG_LOCKFLAG'),
#Register fields for microops
'URa' : intReg('ura'),