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Diffstat (limited to 'src/arch/arm/isa/operands.isa')
| -rw-r--r-- | src/arch/arm/isa/operands.isa | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index 3fda93668..d99211b89 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -99,6 +99,9 @@ def operands {{ maybePCRead, maybeIWPCWrite), 'AIWDest': ('IntReg', 'uw', 'dest', 'IsInteger', 2, maybePCRead, maybeAIWPCWrite), + 'SpMode': ('IntReg', 'uw', + 'intRegInMode((OperatingMode)regMode, INTREG_SP)', + 'IsInteger', 2), 'MiscDest': ('ControlReg', 'uw', 'dest', (None, None, 'IsControl'), 2), 'Base': ('IntReg', 'uw', 'base', 'IsInteger', 0, maybeAlignedPCRead, maybePCWrite), |