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-rw-r--r--src/arch/arm/isa/operands.isa5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa
index dfbf173b8..abf5c42a2 100644
--- a/src/arch/arm/isa/operands.isa
+++ b/src/arch/arm/isa/operands.isa
@@ -189,11 +189,6 @@ def operands {{
'Rb' : ('IntReg', 'uw', 'urb', 'IsInteger', 3, maybePCRead, maybePCWrite),
'Rc' : ('IntReg', 'uw', 'urc', 'IsInteger', 3, maybePCRead, maybePCWrite),
- #General Purpose Floating Point Reg Operands
- 'Fd': ('FloatReg', 'df', 'FD', 'IsFloating', 3),
- 'Fn': ('FloatReg', 'df', 'FN', 'IsFloating', 3),
- 'Fm': ('FloatReg', 'df', 'FM', 'IsFloating', 3),
-
#Memory Operand
'Mem': ('Mem', 'uw', None, ('IsMemRef', 'IsLoad', 'IsStore'), 3),