diff options
Diffstat (limited to 'src/arch/arm/isa/operands.isa')
| -rw-r--r-- | src/arch/arm/isa/operands.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index 9053f6e92..ead058b4c 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -157,7 +157,6 @@ def operands {{ #Pseudo integer condition code registers 'CondCodesF': intRegCC('INTREG_CONDCODES_F'), - 'CondCodesQ': intRegCC('INTREG_CONDCODES_Q'), 'CondCodesGE': intRegCC('INTREG_CONDCODES_GE'), 'OptCondCodesF': intRegCC( '''(condCode == COND_AL || condCode == COND_UC) ? @@ -219,6 +218,7 @@ def operands {{ #Fixed index control regs 'Cpsr': cntrlReg('MISCREG_CPSR', srtCpsr), + 'CpsrQ': cntrlReg('MISCREG_CPSR_Q', srtCpsr), 'Spsr': cntrlRegNC('MISCREG_SPSR'), 'Fpsr': cntrlRegNC('MISCREG_FPSR'), 'Fpsid': cntrlRegNC('MISCREG_FPSID'), |