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-rw-r--r--src/arch/arm/isa/operands.isa1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa
index f82e49109..be4ec6e03 100644
--- a/src/arch/arm/isa/operands.isa
+++ b/src/arch/arm/isa/operands.isa
@@ -46,7 +46,6 @@ def operands {{
'Rm': ('IntReg', 'uw', 'RM', 'IsInteger', 2),
'Rs': ('IntReg', 'uw', 'RS', 'IsInteger', 3),
'Rn': ('IntReg', 'uw', 'RN', 'IsInteger', 4),
- 'Re': ('IntReg', 'uw', 'RE', 'IsInteger', 5),
'Raddr': ('IntReg', 'uw', '17', 'IsInteger', 5),
'R0': ('IntReg', 'uw', '0', 'IsInteger', 5),