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-rw-r--r--src/arch/arm/isa/operands.isa1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa
index 69d8de6da..f403f9372 100644
--- a/src/arch/arm/isa/operands.isa
+++ b/src/arch/arm/isa/operands.isa
@@ -245,6 +245,7 @@ def operands {{
'Thumb': pcStateReg('thumb', srtPC),
'NextThumb': pcStateReg('nextThumb', srtMode),
'NextJazelle': pcStateReg('nextJazelle', srtMode),
+ 'ForcedItState': pcStateReg('forcedItState', srtMode),
#Register operands depending on a field in the instruction encoding. These
#should be avoided since they may not be portable across different