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Diffstat (limited to 'src/arch/arm/isa/operands.isa')
| -rw-r--r-- | src/arch/arm/isa/operands.isa | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index 4ac6790e5..02acc8ed7 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -66,6 +66,7 @@ def operands {{ 'Rhi': ('IntReg', 'uw', 'INTREG_RHI', 'IsInteger', 7), 'Rlo': ('IntReg', 'uw', 'INTREG_RLO', 'IsInteger', 8), 'LR': ('IntReg', 'uw', 'INTREG_LR', 'IsInteger', 9), + 'CondCodes': ('IntReg', 'uw', 'INTREG_CONDCODES', 'IsInteger', 10), #Register fields for microops 'Ra' : ('IntReg', 'uw', 'ura', 'IsInteger', 11, maybePCRead, maybePCWrite), |