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-rw-r--r--src/arch/arm/isa/operands.isa4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa
index 18295cf61..c9df79e1e 100644
--- a/src/arch/arm/isa/operands.isa
+++ b/src/arch/arm/isa/operands.isa
@@ -56,6 +56,10 @@ def operands {{
'Rlo': ('IntReg', 'uw', '19', 'IsInteger', 8),
'LR': ('IntReg', 'uw', '14', 'IsInteger', 9),
+ #Register fields for microops
+ 'Ra' : ('IntReg', 'uw', 'ura', 'IsInteger', 11),
+ 'Rb' : ('IntReg', 'uw', 'urb', 'IsInteger', 12),
+
#General Purpose Floating Point Reg Operands
'Fd': ('FloatReg', 'df', 'FD', 'IsFloating', 20),
'Fn': ('FloatReg', 'df', 'FN', 'IsFloating', 21),