diff options
Diffstat (limited to 'src/arch/arm/isa/templates/branch.isa')
-rw-r--r-- | src/arch/arm/isa/templates/branch.isa | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/src/arch/arm/isa/templates/branch.isa b/src/arch/arm/isa/templates/branch.isa index 92c566726..54821e7c8 100644 --- a/src/arch/arm/isa/templates/branch.isa +++ b/src/arch/arm/isa/templates/branch.isa @@ -43,7 +43,7 @@ class %(class_name)s : public %(base_class)s public: // Constructor %(class_name)s(ExtMachInst machInst, int32_t _imm); - %(BasicExecDeclare)s + Fault execute(ExecContext *, Trace::InstRecord *) const; }; }}; @@ -72,7 +72,7 @@ class %(class_name)s : public %(base_class)s // Constructor %(class_name)s(ExtMachInst machInst, int32_t _imm, ConditionCode _condCode); - %(BasicExecDeclare)s + Fault execute(ExecContext *, Trace::InstRecord *) const; ArmISA::PCState branchTarget(const ArmISA::PCState &branchPC) const; /// Explicitly import the otherwise hidden branchTarget @@ -105,7 +105,7 @@ class %(class_name)s : public %(base_class)s public: // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _op1); - %(BasicExecDeclare)s + Fault execute(ExecContext *, Trace::InstRecord *) const; }; }}; @@ -135,7 +135,7 @@ class %(class_name)s : public %(base_class)s // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, ConditionCode _condCode); - %(BasicExecDeclare)s + Fault execute(ExecContext *, Trace::InstRecord *) const; }; }}; @@ -167,7 +167,7 @@ class %(class_name)s : public %(base_class)s // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2); - %(BasicExecDeclare)s + Fault execute(ExecContext *, Trace::InstRecord *) const; }; }}; @@ -178,11 +178,9 @@ class %(class_name)s : public %(base_class)s // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2); - %(BasicExecDeclare)s - - %(InitiateAccDeclare)s - - %(CompleteAccDeclare)s + Fault execute(ExecContext *, Trace::InstRecord *) const; + Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; + Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; }; }}; @@ -211,7 +209,7 @@ class %(class_name)s : public %(base_class)s // Constructor %(class_name)s(ExtMachInst machInst, int32_t imm, IntRegIndex _op1); - %(BasicExecDeclare)s + Fault execute(ExecContext *, Trace::InstRecord *) const; ArmISA::PCState branchTarget(const ArmISA::PCState &branchPC) const; /// Explicitly import the otherwise hidden branchTarget |