diff options
Diffstat (limited to 'src/arch/arm/isa/templates/macromem.isa')
-rw-r--r-- | src/arch/arm/isa/templates/macromem.isa | 51 |
1 files changed, 49 insertions, 2 deletions
diff --git a/src/arch/arm/isa/templates/macromem.isa b/src/arch/arm/isa/templates/macromem.isa index 5397a2637..c7ebfcd06 100644 --- a/src/arch/arm/isa/templates/macromem.isa +++ b/src/arch/arm/isa/templates/macromem.isa @@ -216,6 +216,31 @@ def template MicroNeonMixLaneDeclare {{ //////////////////////////////////////////////////////////////////// // +// Integer = Integer +// + +def template MicroIntMovDeclare {{ + class %(class_name)s : public %(base_class)s + { + public: + %(class_name)s(ExtMachInst machInst, + RegIndex _ura, RegIndex _urb); + %(BasicExecDeclare)s + }; +}}; +def template MicroIntMovConstructor {{ + %(class_name)s::%(class_name)s(ExtMachInst machInst, + RegIndex _ura, + RegIndex _urb) + : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _ura, _urb) + { + %(constructor)s; + } +}}; + +//////////////////////////////////////////////////////////////////// +// // Integer = Integer op Immediate microops // @@ -225,7 +250,7 @@ def template MicroIntImmDeclare {{ public: %(class_name)s(ExtMachInst machInst, RegIndex _ura, RegIndex _urb, - uint8_t _imm); + int32_t _imm); %(BasicExecDeclare)s }; }}; @@ -234,7 +259,7 @@ def template MicroIntImmConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, RegIndex _ura, RegIndex _urb, - uint8_t _imm) + int32_t _imm) : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _ura, _urb, _imm) { @@ -242,6 +267,28 @@ def template MicroIntImmConstructor {{ } }}; +def template MicroIntRegDeclare {{ + class %(class_name)s : public %(base_class)s + { + public: + %(class_name)s(ExtMachInst machInst, + RegIndex _ura, RegIndex _urb, RegIndex _urc, + int32_t _shiftAmt, ArmShiftType _shiftType); + %(BasicExecDeclare)s + }; +}}; + +def template MicroIntRegConstructor {{ + %(class_name)s::%(class_name)s(ExtMachInst machInst, + RegIndex _ura, RegIndex _urb, RegIndex _urc, + int32_t _shiftAmt, ArmShiftType _shiftType) + : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _ura, _urb, _urc, _shiftAmt, _shiftType) + { + %(constructor)s; + } +}}; + //////////////////////////////////////////////////////////////////// // // Macro Memory-format instructions |