summaryrefslogtreecommitdiff
path: root/src/arch/arm/isa/templates/macromem.isa
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/arm/isa/templates/macromem.isa')
-rw-r--r--src/arch/arm/isa/templates/macromem.isa35
1 files changed, 34 insertions, 1 deletions
diff --git a/src/arch/arm/isa/templates/macromem.isa b/src/arch/arm/isa/templates/macromem.isa
index 9a6de16cc..b252c91e7 100644
--- a/src/arch/arm/isa/templates/macromem.isa
+++ b/src/arch/arm/isa/templates/macromem.isa
@@ -1,6 +1,6 @@
// -*- mode:c++ -*-
-// Copyright (c) 2010-2013 ARM Limited
+// Copyright (c) 2010-2014 ARM Limited
// All rights reserved
//
// The license below extends only to copyright in the software and shall
@@ -77,6 +77,39 @@ def template MicroMemConstructor {{
}
}};
+
+def template MicroMemPairDeclare {{
+ class %(class_name)s : public %(base_class)s
+ {
+ public:
+ %(class_name)s(ExtMachInst machInst,
+ RegIndex _dreg1, RegIndex _dreg2, RegIndex _base,
+ bool _up, uint8_t _imm);
+ %(BasicExecDeclare)s
+ %(InitiateAccDeclare)s
+ %(CompleteAccDeclare)s
+ };
+}};
+
+def template MicroMemPairConstructor {{
+ %(class_name)s::%(class_name)s(ExtMachInst machInst,
+ RegIndex _dreg1,
+ RegIndex _dreg2,
+ RegIndex _base,
+ bool _up,
+ uint8_t _imm)
+ : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
+ _dreg1, _dreg2, _base, _up, _imm)
+ {
+ %(constructor)s;
+ if (!(condCode == COND_AL || condCode == COND_UC)) {
+ for (int x = 0; x < _numDestRegs; x++) {
+ _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
+ }
+ }
+ }
+}};
+
////////////////////////////////////////////////////////////////////
//
// Neon load/store microops