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-rw-r--r--src/arch/arm/isa/templates/mem.isa15
1 files changed, 12 insertions, 3 deletions
diff --git a/src/arch/arm/isa/templates/mem.isa b/src/arch/arm/isa/templates/mem.isa
index 66384331b..3d073b322 100644
--- a/src/arch/arm/isa/templates/mem.isa
+++ b/src/arch/arm/isa/templates/mem.isa
@@ -234,6 +234,8 @@ def template NeonLoadExecute {{
if (fault == NoFault) {
%(op_wb)s;
}
+ } else {
+ xc->setPredicate(false);
}
if (fault == NoFault && machInst.itstateMask != 0 &&
@@ -313,6 +315,8 @@ def template NeonStoreExecute {{
if (fault == NoFault) {
%(op_wb)s;
}
+ } else {
+ xc->setPredicate(false);
}
if (fault == NoFault && machInst.itstateMask != 0 &&
@@ -459,6 +463,8 @@ def template NeonStoreInitiateAcc {{
fault = xc->writeBytes(memUnion.bytes, %(size)d, EA,
memAccessFlags, NULL);
}
+ } else {
+ xc->setPredicate(false);
}
if (fault == NoFault && machInst.itstateMask != 0 &&
@@ -515,9 +521,12 @@ def template NeonLoadInitiateAcc {{
if (fault == NoFault) {
fault = xc->readBytes(EA, NULL, %(size)d, memAccessFlags);
}
- } else if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
+ } else {
+ xc->setPredicate(false);
+ if (fault == NoFault && machInst.itstateMask != 0 &&
+ (!isMicroop() || isLastMicroop())) {
+ xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
+ }
}
return fault;