1 files changed, 0 insertions, 51 deletions
diff --git a/src/arch/arm/isa/templates/misc.isa b/src/arch/arm/isa/templates/misc.isa
index 694dc46da..212897aa0 100644
--- a/src/arch/arm/isa/templates/misc.isa
+++ b/src/arch/arm/isa/templates/misc.isa
@@ -402,54 +402,3 @@ def template RegImmRegShiftOpConstructor {{
     }
 }};
 
-def template ClrexDeclare {{
-    /**
-     * Static instruction class for "%(mnemonic)s".
-     */
-    class %(class_name)s : public %(base_class)s
-    {
-      public:
-
-        /// Constructor.
-        %(class_name)s(ExtMachInst machInst);
-
-        %(BasicExecDeclare)s
-
-        %(InitiateAccDeclare)s
-
-        %(CompleteAccDeclare)s
-    };
-}};
-
-def template ClrexInitiateAcc {{
-    Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
-                                      Trace::InstRecord *traceData) const
-    {
-        Fault fault = NoFault;
-        %(op_decl)s;
-        %(op_rd)s;
-
-        if (%(predicate_test)s)
-        {
-            if (fault == NoFault) {
-                unsigned memAccessFlags = Request::CLEAR_LL |
-                    ArmISA::TLB::AlignWord | Request::LLSC;
-                fault = xc->read(0, (uint32_t&)Mem, memAccessFlags);
-            }
-        } else {
-            xc->setPredicate(false);
-        }
-
-        return fault;
-    }
-}};
-
-def template ClrexCompleteAcc {{
-    Fault %(class_name)s::completeAcc(PacketPtr pkt,
-                                      %(CPU_exec_context)s *xc,
-                                      Trace::InstRecord *traceData) const
-    {
-        return NoFault;
-    }
-}};
-