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-rw-r--r--src/arch/arm/isa/templates/neon.isa27
1 files changed, 6 insertions, 21 deletions
diff --git a/src/arch/arm/isa/templates/neon.isa b/src/arch/arm/isa/templates/neon.isa
index 45df741e7..9e9b79957 100644
--- a/src/arch/arm/isa/templates/neon.isa
+++ b/src/arch/arm/isa/templates/neon.isa
@@ -1,6 +1,6 @@
// -*- mode:c++ -*-
-// Copyright (c) 2010-2012 ARM Limited
+// Copyright (c) 2010-2012, 2016 ARM Limited
// All rights reserved
//
// The license below extends only to copyright in the software and shall
@@ -40,26 +40,11 @@
let {{
simdEnabledCheckCode = '''
{
- uint32_t issEnCheck;
- bool trapEnCheck;
- uint32_t seq;
- if (!vfpNeonEnabled(seq, Hcptr, Nsacr, Cpacr, Cpsr, issEnCheck,
- trapEnCheck, xc->tcBase(), Fpexc, true))
- {return disabledFault();}
- if (trapEnCheck) {
- CPSR cpsrEnCheck = Cpsr;
- if (cpsrEnCheck.mode == MODE_HYP) {
- return std::make_shared<UndefinedInstruction>(
- machInst, issEnCheck,
- EC_TRAPPED_HCPTR);
- } else {
- if (!inSecureState(Scr, Cpsr)) {
- return std::make_shared<HypervisorTrap>(
- machInst, issEnCheck,
- EC_TRAPPED_HCPTR);
- }
- }
- }
+ Fault fault = checkAdvSIMDOrFPEnabled32(xc->tcBase(),
+ Cpsr, Cpacr, Nsacr, Fpexc,
+ true, true);
+ if (fault != NoFault)
+ return fault;
}
'''
}};