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Diffstat (limited to 'src/arch/arm/isa/templates/pred.isa')
-rw-r--r-- | src/arch/arm/isa/templates/pred.isa | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/arch/arm/isa/templates/pred.isa b/src/arch/arm/isa/templates/pred.isa index 15d34da19..c8f30ddf0 100644 --- a/src/arch/arm/isa/templates/pred.isa +++ b/src/arch/arm/isa/templates/pred.isa @@ -46,7 +46,11 @@ // let {{ - predicateTest = 'testPredicate(CondCodes, condCode)' + predicateTest = ''' + testPredicate(CondCodes, machInst.itstateMask ? + (ConditionCode)(uint8_t)machInst.itstateCond : + condCode) + ''' }}; def template DataImmDeclare {{ @@ -143,6 +147,10 @@ def template PredOpExecute {{ } } + if (fault == NoFault && machInst.itstateMask != 0) { + xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate); + } + return fault; } }}; |