summaryrefslogtreecommitdiff
path: root/src/arch/arm/isa/templates
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/arm/isa/templates')
-rw-r--r--src/arch/arm/isa/templates/macromem.isa4
-rw-r--r--src/arch/arm/isa/templates/mem.isa81
-rw-r--r--src/arch/arm/isa/templates/misc.isa7
-rw-r--r--src/arch/arm/isa/templates/neon.isa8
-rw-r--r--src/arch/arm/isa/templates/pred.isa10
5 files changed, 0 insertions, 110 deletions
diff --git a/src/arch/arm/isa/templates/macromem.isa b/src/arch/arm/isa/templates/macromem.isa
index a7f7f0da8..a62dec5cf 100644
--- a/src/arch/arm/isa/templates/macromem.isa
+++ b/src/arch/arm/isa/templates/macromem.isa
@@ -241,10 +241,6 @@ def template MicroNeonMixExecute {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
diff --git a/src/arch/arm/isa/templates/mem.isa b/src/arch/arm/isa/templates/mem.isa
index f26ee55e8..43a742242 100644
--- a/src/arch/arm/isa/templates/mem.isa
+++ b/src/arch/arm/isa/templates/mem.isa
@@ -102,11 +102,6 @@ def template SwapExecute {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -135,11 +130,6 @@ def template SwapInitiateAcc {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -166,10 +156,6 @@ def template SwapCompleteAcc {{
}
}
- if (fault == NoFault && machInst.itstateMask != 0) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -199,11 +185,6 @@ def template LoadExecute {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -238,11 +219,6 @@ def template NeonLoadExecute {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -276,11 +252,6 @@ def template StoreExecute {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -319,11 +290,6 @@ def template NeonStoreExecute {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -363,11 +329,6 @@ def template StoreExExecute {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -396,10 +357,6 @@ def template StoreExInitiateAcc {{
} else {
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
return fault;
}
@@ -430,11 +387,6 @@ def template StoreInitiateAcc {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -467,11 +419,6 @@ def template NeonStoreInitiateAcc {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -494,10 +441,6 @@ def template LoadInitiateAcc {{
}
} else {
xc->setPredicate(false);
- if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
}
return fault;
@@ -523,10 +466,6 @@ def template NeonLoadInitiateAcc {{
}
} else {
xc->setPredicate(false);
- if (fault == NoFault && machInst.itstateMask != 0 &&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
}
return fault;
@@ -557,10 +496,6 @@ def template LoadCompleteAcc {{
}
}
- if (fault == NoFault && machInst.itstateMask != 0) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -591,10 +526,6 @@ def template NeonLoadCompleteAcc {{
}
}
- if (fault == NoFault && machInst.itstateMask != 0) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -604,10 +535,6 @@ def template StoreCompleteAcc {{
%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
- if (machInst.itstateMask != 0) {
- warn_once("Complete acc isn't called on normal stores in O3.");
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
return NoFault;
}
}};
@@ -618,10 +545,6 @@ def template NeonStoreCompleteAcc {{
PacketPtr pkt, %(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
- if (machInst.itstateMask != 0) {
- warn_once("Complete acc isn't called on normal stores in O3.");
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
return NoFault;
}
}};
@@ -646,10 +569,6 @@ def template StoreExCompleteAcc {{
}
}
- if (fault == NoFault && machInst.itstateMask != 0) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
diff --git a/src/arch/arm/isa/templates/misc.isa b/src/arch/arm/isa/templates/misc.isa
index 0347869f8..694dc46da 100644
--- a/src/arch/arm/isa/templates/misc.isa
+++ b/src/arch/arm/isa/templates/misc.isa
@@ -438,9 +438,6 @@ def template ClrexInitiateAcc {{
}
} else {
xc->setPredicate(false);
- if (fault == NoFault && machInst.itstateMask != 0) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
}
return fault;
@@ -452,10 +449,6 @@ def template ClrexCompleteAcc {{
%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
- if (machInst.itstateMask != 0) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return NoFault;
}
}};
diff --git a/src/arch/arm/isa/templates/neon.isa b/src/arch/arm/isa/templates/neon.isa
index 2e88c9333..fe3a026b8 100644
--- a/src/arch/arm/isa/templates/neon.isa
+++ b/src/arch/arm/isa/templates/neon.isa
@@ -229,10 +229,6 @@ def template NeonEqualRegExecute {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -281,10 +277,6 @@ def template NeonUnequalRegExecute {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
diff --git a/src/arch/arm/isa/templates/pred.isa b/src/arch/arm/isa/templates/pred.isa
index 95c7c8e1b..4ab1335e0 100644
--- a/src/arch/arm/isa/templates/pred.isa
+++ b/src/arch/arm/isa/templates/pred.isa
@@ -174,11 +174,6 @@ def template PredOpExecute {{
xc->setPredicate(false);
}
- if (fault == NoFault && machInst.itstateMask != 0&&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
@@ -206,11 +201,6 @@ def template QuiescePredOpExecute {{
#endif
}
- if (fault == NoFault && machInst.itstateMask != 0&&
- (!isMicroop() || isLastMicroop())) {
- xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
- }
-
return fault;
}
}};
generated by cgit v1.2.3 (git 2.25.1) at 2025-02-04 22:33:19 +0000