1 files changed, 10 insertions, 10 deletions

diff --git a/src/arch/arm/isa/templates/misc.isa b/src/arch/arm/isa/templates/misc.isa
index 82e9aeab7..ec660c5a1 100644
--- a/src/arch/arm/isa/templates/misc.isa
+++ b/src/arch/arm/isa/templates/misc.isa
@@ -120,52 +120,52 @@ def template RevOpConstructor {{
     }
 }};
 
-def template SatOpDeclare {{
+def template RegImmRegOpDeclare {{
 class %(class_name)s : public %(base_class)s
 {
   protected:
     public:
         // Constructor
         %(class_name)s(ExtMachInst machInst,
-                       IntRegIndex _dest, uint32_t _satImm, IntRegIndex _op1);
+                       IntRegIndex _dest, uint32_t _imm, IntRegIndex _op1);
         %(BasicExecDeclare)s
 };
 }};
 
-def template SatOpConstructor {{
+def template RegImmRegOpConstructor {{
     inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
                                           IntRegIndex _dest,
-                                          uint32_t _satImm,
+                                          uint32_t _imm,
                                           IntRegIndex _op1)
         : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
-                         _dest, _satImm, _op1)
+                         _dest, _imm, _op1)
     {
         %(constructor)s;
     }
 }};
 
-def template SatShiftOpDeclare {{
+def template RegImmRegShiftOpDeclare {{
 class %(class_name)s : public %(base_class)s
 {
   protected:
     public:
         // Constructor
         %(class_name)s(ExtMachInst machInst,
-                       IntRegIndex _dest, uint32_t _satImm, IntRegIndex _op1,
+                       IntRegIndex _dest, uint32_t _imm, IntRegIndex _op1,
                        int32_t _shiftAmt, ArmShiftType _shiftType);
         %(BasicExecDeclare)s
 };
 }};
 
-def template SatShiftOpConstructor {{
+def template RegImmRegShiftOpConstructor {{
     inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
                                           IntRegIndex _dest,
-                                          uint32_t _satImm,
+                                          uint32_t _imm,
                                           IntRegIndex _op1,
                                           int32_t _shiftAmt,
                                           ArmShiftType _shiftType)
         : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
-                         _dest, _satImm, _op1, _shiftAmt, _shiftType)
+                         _dest, _imm, _op1, _shiftAmt, _shiftType)
     {
         %(constructor)s;
     }