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-rw-r--r--src/arch/arm/isa/formats/m5ops.isa1
-rw-r--r--src/arch/arm/isa/insts/m5ops.isa18
2 files changed, 19 insertions, 0 deletions
diff --git a/src/arch/arm/isa/formats/m5ops.isa b/src/arch/arm/isa/formats/m5ops.isa
index f532d828b..534d12cd9 100644
--- a/src/arch/arm/isa/formats/m5ops.isa
+++ b/src/arch/arm/isa/formats/m5ops.isa
@@ -64,6 +64,7 @@ def format M5ops() {{
case 0x42: return new Dumpresetstats(machInst);
case 0x43: return new M5checkpoint(machInst);
#if FULL_SYSTEM
+ case 0x4F: return new M5writefile(machInst);
case 0x50: return new M5readfile(machInst);
#endif
case 0x51: return new M5break(machInst);
diff --git a/src/arch/arm/isa/insts/m5ops.isa b/src/arch/arm/isa/insts/m5ops.isa
index 222ecc647..1a154459e 100644
--- a/src/arch/arm/isa/insts/m5ops.isa
+++ b/src/arch/arm/isa/insts/m5ops.isa
@@ -265,6 +265,24 @@ let {{
decoder_output += BasicConstructor.subst(m5readfileIop)
exec_output += PredOpExecute.subst(m5readfileIop)
+ m5writefileCode = '''
+#if FULL_SYSTEM
+ int n = 4;
+ uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false);
+ n = 6;
+ Addr filenameAddr = getArgument(xc->tcBase(), n, sizeof(Addr), false);
+ R0 = PseudoInst::writefile(xc->tcBase(), R0, join32to64(R3,R2), offset,
+ filenameAddr);
+#endif
+ '''
+ m5writefileIop = InstObjParams("m5writefile", "M5writefile", "PredOp",
+ { "code": m5writefileCode,
+ "predicate_test": predicateTest },
+ ["IsNonSpeculative"])
+ header_output += BasicDeclare.subst(m5writefileIop)
+ decoder_output += BasicConstructor.subst(m5writefileIop)
+ exec_output += PredOpExecute.subst(m5writefileIop)
+
m5breakIop = InstObjParams("m5break", "M5break", "PredOp",
{ "code": "PseudoInst::debugbreak(xc->tcBase());",
"predicate_test": predicateTest },