diff options
Diffstat (limited to 'src/arch/arm/isa')
-rw-r--r-- | src/arch/arm/isa/formats/fp.isa | 10 | ||||
-rw-r--r-- | src/arch/arm/isa/formats/misc.isa | 5 | ||||
-rw-r--r-- | src/arch/arm/isa/insts/neon.isa | 79 |
3 files changed, 66 insertions, 28 deletions
diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa index 9d40a4a43..3a0cad1c5 100644 --- a/src/arch/arm/isa/formats/fp.isa +++ b/src/arch/arm/isa/formats/fp.isa @@ -758,7 +758,15 @@ let {{ bits(machInst, 24)) << 7) | (bits(machInst, 18, 16) << 4) | (bits(machInst, 3, 0) << 0); - const uint64_t bigImm = simd_modified_imm(op, cmode, imm); + + // Check for invalid immediate encodings and return an unknown op + // if it happens + bool immValid = true; + const uint64_t bigImm = simd_modified_imm(op, cmode, imm, immValid); + if (!immValid) { + return new Unknown(machInst); + } + if (op) { if (bits(cmode, 3) == 0) { if (bits(cmode, 0) == 0) { diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa index c2003fe6d..6a734a582 100644 --- a/src/arch/arm/isa/formats/misc.isa +++ b/src/arch/arm/isa/formats/misc.isa @@ -100,7 +100,10 @@ let {{ case MISCREG_NOP: return new NopInst(machInst); case NUM_MISCREGS: - return new Unknown(machInst); + return new FailUnimplemented( + csprintf("miscreg crn:%d opc1:%d crm:%d opc2:%d %s unknown", + crn, opc1, crm, opc2, isRead ? "read" : "write").c_str(), + machInst); case MISCREG_DCCISW: return new WarnUnimplemented( isRead ? "mrc dccisw" : "mcr dcisw", machInst); diff --git a/src/arch/arm/isa/insts/neon.isa b/src/arch/arm/isa/insts/neon.isa index a2948b90a..5aca525a4 100644 --- a/src/arch/arm/isa/insts/neon.isa +++ b/src/arch/arm/isa/insts/neon.isa @@ -871,14 +871,21 @@ let {{ if readDest: readDestCode = 'destElem = gtoh(destReg.elements[i]);' eWalkCode += ''' - assert(imm >= 0 && imm < eCount); - for (unsigned i = 0; i < eCount; i++) { - Element srcElem1 = gtoh(srcReg1.elements[i]); - Element srcElem2 = gtoh(srcReg2.elements[imm]); - Element destElem; - %(readDest)s - %(op)s - destReg.elements[i] = htog(destElem); + if (imm < 0 && imm >= eCount) { +#if FULL_SYSTEM + fault = new UndefinedInstruction; +#else + fault = new UndefinedInstruction(false, mnemonic); +#endif + } else { + for (unsigned i = 0; i < eCount; i++) { + Element srcElem1 = gtoh(srcReg1.elements[i]); + Element srcElem2 = gtoh(srcReg2.elements[imm]); + Element destElem; + %(readDest)s + %(op)s + destReg.elements[i] = htog(destElem); + } } ''' % { "op" : op, "readDest" : readDestCode } for reg in range(rCount): @@ -919,14 +926,21 @@ let {{ if readDest: readDestCode = 'destElem = gtoh(destReg.elements[i]);' eWalkCode += ''' - assert(imm >= 0 && imm < eCount); - for (unsigned i = 0; i < eCount; i++) { - Element srcElem1 = gtoh(srcReg1.elements[i]); - Element srcElem2 = gtoh(srcReg2.elements[imm]); - BigElement destElem; - %(readDest)s - %(op)s - destReg.elements[i] = htog(destElem); + if (imm < 0 && imm >= eCount) { +#if FULL_SYSTEM + fault = new UndefinedInstruction; +#else + fault = new UndefinedInstruction(false, mnemonic); +#endif + } else { + for (unsigned i = 0; i < eCount; i++) { + Element srcElem1 = gtoh(srcReg1.elements[i]); + Element srcElem2 = gtoh(srcReg2.elements[imm]); + BigElement destElem; + %(readDest)s + %(op)s + destReg.elements[i] = htog(destElem); + } } ''' % { "op" : op, "readDest" : readDestCode } for reg in range(2 * rCount): @@ -965,14 +979,21 @@ let {{ if readDest: readDestCode = 'destReg = destRegs[i];' eWalkCode += ''' - assert(imm >= 0 && imm < rCount); - for (unsigned i = 0; i < rCount; i++) { - FloatReg srcReg1 = srcRegs1[i]; - FloatReg srcReg2 = srcRegs2[imm]; - FloatReg destReg; - %(readDest)s - %(op)s - destRegs[i] = destReg; + if (imm < 0 && imm >= eCount) { +#if FULL_SYSTEM + fault = new UndefinedInstruction; +#else + fault = new UndefinedInstruction(false, mnemonic); +#endif + } else { + for (unsigned i = 0; i < rCount; i++) { + FloatReg srcReg1 = srcRegs1[i]; + FloatReg srcReg2 = srcRegs2[imm]; + FloatReg destReg; + %(readDest)s + %(op)s + destRegs[i] = destReg; + } } ''' % { "op" : op, "readDest" : readDestCode } for reg in range(rCount): @@ -3277,8 +3298,14 @@ let {{ destReg.elements[i] = srcReg1.elements[index]; } else { index -= eCount; - assert(index < eCount); - destReg.elements[i] = srcReg2.elements[index]; + if (index >= eCount) +#if FULL_SYSTEM + fault = new UndefinedInstruction; +#else + fault = new UndefinedInstruction(false, mnemonic); +#endif + else + destReg.elements[i] = srcReg2.elements[index]; } } ''' |