diff options
Diffstat (limited to 'src/arch/arm/isa')
| -rw-r--r-- | src/arch/arm/isa/insts/misc.isa | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa index 42dea7b95..7ec18c9e9 100644 --- a/src/arch/arm/isa/insts/misc.isa +++ b/src/arch/arm/isa/insts/misc.isa @@ -514,4 +514,24 @@ let {{ header_output += RegRegOpDeclare.subst(mcr15Iop) decoder_output += RegRegOpConstructor.subst(mcr15Iop) exec_output += PredOpExecute.subst(mcr15Iop) + + enterxCode = ''' + FNPC = NPC | (1ULL << PcJBitShift) | (1ULL << PcTBitShift); + ''' + enterxIop = InstObjParams("enterx", "Enterx", "PredOp", + { "code": enterxCode, + "predicate_test": predicateTest }, []) + header_output += BasicDeclare.subst(enterxIop) + decoder_output += BasicConstructor.subst(enterxIop) + exec_output += PredOpExecute.subst(enterxIop) + + leavexCode = ''' + FNPC = (NPC & ~(1ULL << PcJBitShift)) | (1ULL << PcTBitShift); + ''' + leavexIop = InstObjParams("leavex", "Leavex", "PredOp", + { "code": leavexCode, + "predicate_test": predicateTest }, []) + header_output += BasicDeclare.subst(leavexIop) + decoder_output += BasicConstructor.subst(leavexIop) + exec_output += PredOpExecute.subst(leavexIop) }}; |