diff options
Diffstat (limited to 'src/arch/arm/isa')
-rw-r--r-- | src/arch/arm/isa/operands.isa | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index fb3e4de35..0f656dac9 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -266,14 +266,14 @@ def operands {{ #Abstracted floating point reg operands 'FpDest': vectorElem('dest / 4', 'dest % 4'), - 'FpDestP0': vectorElem('dest / 4', '(dest % 4) + 0'), - 'FpDestP1': vectorElem('dest / 4', '(dest % 4) + 1'), - 'FpDestP2': vectorElem('dest / 4', '(dest % 4) + 2'), - 'FpDestP3': vectorElem('dest / 4', '(dest % 4) + 3'), - 'FpDestP4': vectorElem('(dest / 4) + 1', '(dest % 4) + 0'), - 'FpDestP5': vectorElem('(dest / 4) + 1', '(dest % 4) + 1'), - 'FpDestP6': vectorElem('(dest / 4) + 1', '(dest % 4) + 2'), - 'FpDestP7': vectorElem('(dest / 4) + 1', '(dest % 4) + 3'), + 'FpDestP0': vectorElem('(dest + 0) / 4', '(dest + 0) % 4'), + 'FpDestP1': vectorElem('(dest + 1) / 4', '(dest + 1) % 4'), + 'FpDestP2': vectorElem('(dest + 2) / 4', '(dest + 2) % 4'), + 'FpDestP3': vectorElem('(dest + 3) / 4', '(dest + 3) % 4'), + 'FpDestP4': vectorElem('(dest + 4) / 4', '(dest + 4) % 4'), + 'FpDestP5': vectorElem('(dest + 5) / 4', '(dest + 5) % 4'), + 'FpDestP6': vectorElem('(dest + 6) / 4', '(dest + 6) % 4'), + 'FpDestP7': vectorElem('(dest + 7) / 4', '(dest + 7) % 4'), 'FpDestS0P0': vectorElem( '(dest + step * 0 + 0) / 4', '(dest + step * 0 + 0) % 4'), @@ -293,20 +293,20 @@ def operands {{ '(dest + step * 3 + 1) / 4', '(dest + step * 3 + 1) % 4'), 'FpDest2': vectorElem('dest2 / 4', 'dest2 % 4'), - 'FpDest2P0': vectorElem('dest2 / 4', '(dest2 % 4) + 0'), - 'FpDest2P1': vectorElem('dest2 / 4', '(dest2 % 4) + 1'), - 'FpDest2P2': vectorElem('dest2 / 4', '(dest2 % 4) + 2'), - 'FpDest2P3': vectorElem('dest2 / 4', '(dest2 % 4) + 3'), + 'FpDest2P0': vectorElem('(dest2 + 0) / 4', '(dest2 + 0) % 4'), + 'FpDest2P1': vectorElem('(dest2 + 1) / 4', '(dest2 + 1) % 4'), + 'FpDest2P2': vectorElem('(dest2 + 2) / 4', '(dest2 + 2) % 4'), + 'FpDest2P3': vectorElem('(dest2 + 3) / 4', '(dest2 + 3) % 4'), 'FpOp1': vectorElem('op1 / 4', 'op1 % 4'), - 'FpOp1P0': vectorElem('op1 / 4', '(op1 % 4) + 0'), - 'FpOp1P1': vectorElem('op1 / 4', '(op1 % 4) + 1'), - 'FpOp1P2': vectorElem('op1 / 4', '(op1 % 4) + 2'), - 'FpOp1P3': vectorElem('op1 / 4', '(op1 % 4) + 3'), - 'FpOp1P4': vectorElem('(op1 / 4) + 1', '(op1 % 4) + 0'), - 'FpOp1P5': vectorElem('(op1 / 4) + 1', '(op1 % 4) + 1'), - 'FpOp1P6': vectorElem('(op1 / 4) + 1', '(op1 % 4) + 2'), - 'FpOp1P7': vectorElem('(op1 / 4) + 1', '(op1 % 4) + 3'), + 'FpOp1P0': vectorElem('(op1 + 0) / 4', '(op1 + 0) % 4'), + 'FpOp1P1': vectorElem('(op1 + 1) / 4', '(op1 + 1) % 4'), + 'FpOp1P2': vectorElem('(op1 + 2) / 4', '(op1 + 2) % 4'), + 'FpOp1P3': vectorElem('(op1 + 3) / 4', '(op1 + 3) % 4'), + 'FpOp1P4': vectorElem('(op1 + 4) / 4', '(op1 + 4) % 4'), + 'FpOp1P5': vectorElem('(op1 + 5) / 4', '(op1 + 5) % 4'), + 'FpOp1P6': vectorElem('(op1 + 6) / 4', '(op1 + 6) % 4'), + 'FpOp1P7': vectorElem('(op1 + 7) / 4', '(op1 + 7) % 4'), 'FpOp1S0P0': vectorElem( '(op1 + step * 0 + 0) / 4', '(op1 + step * 0 + 0) % 4'), @@ -326,10 +326,10 @@ def operands {{ '(op1 + step * 3 + 1) / 4', '(op1 + step * 3 + 1) % 4'), 'FpOp2': vectorElem('op2 / 4', 'op2 % 4'), - 'FpOp2P0': vectorElem('op2 / 4', '(op2 % 4) + 0'), - 'FpOp2P1': vectorElem('op2 / 4', '(op2 % 4) + 1'), - 'FpOp2P2': vectorElem('op2 / 4', '(op2 % 4) + 2'), - 'FpOp2P3': vectorElem('op2 / 4', '(op2 % 4) + 3'), + 'FpOp2P0': vectorElem('(op2 + 0) / 4', '(op2 + 0) % 4'), + 'FpOp2P1': vectorElem('(op2 + 1) / 4', '(op2 + 1) % 4'), + 'FpOp2P2': vectorElem('(op2 + 2) / 4', '(op2 + 2) % 4'), + 'FpOp2P3': vectorElem('(op2 + 3) / 4', '(op2 + 3) % 4'), # Create AArch64 unpacked view of the FP registers # Name ::= 'AA64Vec' OpSpec [LaneSpec] |