summaryrefslogtreecommitdiff
path: root/src/arch/arm/kvm/armv8_cpu.hh
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/arm/kvm/armv8_cpu.hh')
-rw-r--r--src/arch/arm/kvm/armv8_cpu.hh14
1 files changed, 10 insertions, 4 deletions
diff --git a/src/arch/arm/kvm/armv8_cpu.hh b/src/arch/arm/kvm/armv8_cpu.hh
index 63e03908f..101ccc211 100644
--- a/src/arch/arm/kvm/armv8_cpu.hh
+++ b/src/arch/arm/kvm/armv8_cpu.hh
@@ -40,6 +40,7 @@
#ifndef __ARCH_ARM_KVM_ARMV8_CPU_HH__
#define __ARCH_ARM_KVM_ARMV8_CPU_HH__
+#include <set>
#include <vector>
#include "arch/arm/intregs.hh"
@@ -107,8 +108,9 @@ class ArmV8KvmCPU : public BaseArmKvmCPU
/** Mapping between misc registers in gem5 and registers in KVM */
struct MiscRegInfo {
- MiscRegInfo(uint64_t _kvm, MiscRegIndex _idx, const char *_name)
- : kvm(_kvm), idx(_idx), name(_name) {}
+ MiscRegInfo(uint64_t _kvm, MiscRegIndex _idx, const char *_name,
+ bool _is_device = false)
+ : kvm(_kvm), idx(_idx), name(_name), is_device(_is_device) {}
/** Register index in KVM */
uint64_t kvm;
@@ -116,6 +118,8 @@ class ArmV8KvmCPU : public BaseArmKvmCPU
MiscRegIndex idx;
/** Name to use in debug dumps */
const char *name;
+ /** is device register? (needs 'effectful' state update) */
+ bool is_device;
};
/**
@@ -132,9 +136,11 @@ class ArmV8KvmCPU : public BaseArmKvmCPU
/** Mapping between gem5 integer registers and integer registers in kvm */
static const std::vector<ArmV8KvmCPU::IntRegInfo> intRegMap;
- /** Mapping between gem5 misc registers registers and registers in kvm */
+ /** Mapping between gem5 misc registers and registers in kvm */
static const std::vector<ArmV8KvmCPU::MiscRegInfo> miscRegMap;
- /** Mapping between gem5 ID misc registers registers and registers in kvm */
+ /** Device registers (needing "effectful" MiscReg writes) */
+ static const std::set<MiscRegIndex> deviceRegSet;
+ /** Mapping between gem5 ID misc registers and registers in kvm */
static const std::vector<ArmV8KvmCPU::MiscRegInfo> miscRegIdMap;
/** Cached mapping between system registers in kvm and misc regs in gem5 */